Digital CMOS ICs
To provide knowledge of Digital CMOS ICs
Process flow and masking steps for MOS and CMOS technologies, Lambda based design rules- Electrical behavior of MOS transistors; Latch up in CMOS technology.
Layer properties of various conducting layers in MOS technology (diffusion, poly-silicon and metal): Sheet resistance, relative capacitance.
Fundamental time constant (τ) for a technology.
Design and analysis of NMOS (enhancement and depletion) and CMOS inverters; rationing of transistor size, logic threshold, logic low voltage level, rise and fall of delays.
Design of basic gates in NMOS technology; CMOS logic design styles: static CMOS logic (AND, NOR gates), complex gates, domino logic, pseudo NMOS logic, clocked CMOS (C2 MOS) logic.
Structured logic design: programmable arrays.
Design of latches and flip-flops, static memory cell and dynamic memory cell.
Sense amplifier- necessity, design, influence of Sense Amplifier on cell Architecture.
MOS scaling theory and scaling of interconnection.
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5. Rabaey et al., Digital Integrated Circuits, Pearson India, 2002.
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9. Glasser and Dobberpuhl, Design and analysis of VLSI circuits, Addison Wesley, 1985.
Last updated on: Monday, June 27, 2011